Abstract：

Analog-to-Digital Converters (ADCs) are critical components as interfaces between the analog world and digital processor in modern system-on-chips (SoCs). Successive approximation register (SAR) ADC becomes popular as it is low power and digital scaling friendly. Three interesting techniques to further improve SAR ADC efficiency will be discussed in this talk.

The specifications of the SAR ADCs are driven by different applications. For energy constraint applications, such as wireless sensors and biomedical implants, low-speed and moderate-resolution ADCs are required. A statistical noise estimation technique will be discussed. We will take advantage of thermal noise and achieve a Signal-to-Noise Ratio (SNR) enhancement.

High-speed ADCs are widely used in measurement instruments, serial link transceivers, and wireless communication systems. A novel calibration free architecture is proposed to perform A/D conversion at a high speed while maintaining the power efficiency.

The energy-efficient converter design expertise is leveraged to the sensor readout system. An ADC assisted Capacitance-to-Digital Converter (CDC) will be discussed at the end. By performing Time-Domain ΔΣM with a zoomed-SAR operation, this capacitance converter achieves > 2x energy efficient improvement compared to all prior works.

Bio：

Xiyuan Tang received the B.Sc. degree (Hons.) from the School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China, in 2012, and the M.S. degree in electrical engineering from The University of Texas at Austin, Austin, TX, USA, where he is currently pursuing the Ph.D. degree. He was a Design Engineer with Silicon Laboratories, Austin, from 2014 to 2017, where he was involved in receiver design. His research interests include digitally assisted data converters, low-power mixed-signal circuits, and analog data processing.

Mr. Tang received the National Scholarship in China in 2011. He serves as a reviewer for the IEEE TCAS-I, IEEE TVLSI, and IEEE Sensor Journal.